Quantum circuits for the most promising applications will likely exceed the limits of NISQ hardware due to noise. Fault-tolerance schemes enable reliable execution on encoded qubits but impose scheme-specific constraints on the operations available to a circuit. An ambitious goal is to both (1) design algorithms and circuits that efficiently exploit the fault-tolerant operations of a given scheme, and (2) design fault-tolerance schemes that enhance the computational power of the circuits they support. This is challenging, in part because the fields of fault tolerance, quantum algorithms and quantum circuit compilation are rapidly evolving and largely pursued by separate research communities. This workshop aims to foster tighter collaboration between these areas.